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CMOS Fractional-N Synthesizers: Design for High Spectral Purity and Monolithic Integration


CMOS Fractional-N Synthesizers: Design for High Spectral Purity and Monolithic Integration
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  • 10417487


Beschreibung

I: Abstract. List of Symbols and Abbreviations. Table of Contents. 1: Introduction. 1.1. Telecommunications: An Overview. 1.2. Telecommunications: A Market Perception. 1.3. Integration: Why, How and In What? 1.4. The Research Book. 1.5. The Outline of the Book. 2: On Frequency Synthesis. 2.1. Introduction. 2.2. Indirect or Phase-Locked Loop Frequency Synthesizers. 2.3. The Synthesizer Data Sheet. 2.4. Introduction to PLL building blocks. 2.5. Advanced PLL Frequency Synthesizers. 2.6. Frequency Synthesis for the DCS-1800 System. 2.7. Conclusion. 3: High-Speed CMOS Prescalers. 3.1. Introduction. 3.2. The Phase-Switching Dual-Modulus Prescaler. 3.3. A Single-Ended 1.5 GHz 8/9 Dual-Modulus Prescaler in 0.7 mum CMOS. 3.4. A Single-ended 1.8 GHz 8/9 DMP in 0.8 mum 'Radiation Hardened' BiCMOS. 3.5. A 1.8 GH.z 16-modulus /64-/79 Prescaler in 0.25 mum CMOS. 3.6. A 12 GHz /128 Prescaler in 0.25 mum CMOS. 3.7. Conclusion. 4: Monolithic CMOS LC-VCOs. 4.1. Introduction. 4.2. General Oscillator Theory. 4.3. A Design-Oriented Non-Linear Phase Noise Theory. 4.4. Integrated LC-tanks in CMOS. 4.5. The VCO Circuit Design. 4.6. Implementations. 4.7. Comparison with Published State-of-the-Art VCOs. 4.8. Conclusion. 5: Monolithic Phase Loops. 5.1. Introduction. 5.2. Loop Filter Topology Selection. 5.3. Dual-Path Fourth-Order PLL. 5.4. The PLL Building Block Circuits. 5.5. Experimental Results. 5.6. Conclusion. 6: A 1.8 GHz CMOS &Dgr;&Sgr; Fractional-N Frequency Synthesizer. 6.1. Introduction. 6.2. The Fractional-N Principle. 6.3. Conventional Fractional Compensation Methods. 6.4. &Dgr;&Sgr; Modulation in Fractional-N Synthesis. 6.5. &Dgr;&Sgr; Modulators for Fractional-N Synthesis. 6.6. The Theoretical &Dgr;&Sgr; Phase Noise Analysis. 6.7. A Fast Non-Linear &Dgr;&Sgr; Phase Noise Analysis Method. 6.8. The Fractional-N Synthesizer Circuit Design. 6.9. Experimental Results. 6.10. Conclusion. 7: Conclusions. 7.1. A 2V CMOS Cellular Transceiver Front-End. 7.2. Main Contributions and Achievements. 7.3. Epilogue. A: &Dgr;&Sgr; Modulators with DC-inputs. B: Additional Results of the Non-Linear Analysis for Fractional-N Synthesizers. Index. Bibliography.

Eigenschaften

Breite: 155
Gewicht: 423 g
Höhe: 235
Länge: 235
Seiten: 256
Sprachen: Englisch
Autor: Bram De Muer, Michiel Steyaert

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